When considering digital transmission based on amplitude and phase modulation and demodulation of a carrier along two axes in quadrature, a technical problem arises concerning the ideal positioning for the instant of regeneration on each of the X and Y paths on reception of the demodulated signal.
In order to ensure that a proper decision is performed on reception, i.e. that a decision is performed such that the regenerated signal is identical to the transmitted signal, it is essential for the decision instant employed on each of the X and Y paths to be as close as possible to the optimum decision instant.
Unfortunately, not only must the regeneration clock be recovered by processing the received signal, but also the time equalilzer which is controlled by information taken from the received signal at the instants of regeneration disturbs certain methods of recovering the modulation clock.
Thus, the clock servo-control method described in the article by K. H. Mueller, and M. Mueller entitled "Timing recovery in digital synchronous data receivers" published in IEEE Trans. on Comm., May 1976 is defeated by the presence of a time equalizer (at intermediate frequency or in baseband) which flattens out the phase characteristic.
The method of servo-controlling the clock described in the article by H. Sari, et al, entitled "Minimum mean-square error timing recovery schemes for digital dequalizers" published in IEEE Trans. on Comm., May 1986 cannot be implemented simultaneously on both the X and the Y paths because of the coupling induced by time equalization at intermediate frequency (the servo-control on one path flattens out the phase characteristic of the servo-control on the other path because of the coupling induced by time equalization at intermediate frequency).
In another prior art circuit, a clock frequency spectrum line is regenerated on each path (by means of a non-linear circuit applied to the signal, e.g. a differentiator detecting the passes of the signal through its mean level, thus creating a clock rate spectrum line), and this frequency line is then synchronized by means of a phase-locked loop (thus performing narrow band filtering which ensures that the recovered clock is relatively noise-free). Finally, a phase shifter which is manually adjusted during a set-up procedure (in which a minimum error rate is sought in the presence of thermal noise) serves to sample the received signal at the optimum phase.
This solution suffers from the severe drawback of requiring phase shifters to be manually adjusted for both the X and the Y paths in order to obtain a minimum error rate in the presence of thermal noise. Unfortunately, the error rate depends simultaneously on two different parameters (since the regenerated digital signals from the X and Y paths are multiplexed), thereby requiring the search for the optimum to proceed by repeated adjustments.
Further, phase drift due to various factors (ageing, temperature, variation of power supply voltage, etc.) is not compensated in satisfactory manner: only such drift as is common to both paths (common mode) is compensated by the time equalizer, whereas differential drift cannot be compensated in this way and reduces receiver performance.
The object of the invention is to mitigate these drawbacks.